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Краткое описание:
FPGA Arria V GX 300K Cells 28nm 1152-Pin FC-FBGA 6.55Gbps Transceiver
Дополнительная информация
Field Programmable Gate Array (FPGA) with 300,000 logic cells and 28nm process technology. Features 1152 pins in a 35x35mm Flip Chip Fine Pitch Ball Grid Array (FC-FBGA) package for surface mounting. Offers 544 user I/Os, 15100 Kbit RAM, 920 dedicated DSP blocks, and 1840 multipliers. Supports multiple external memory interfaces including DDR2, DDR3, and LPDDR2 SDRAM. Includes 2 Ethernet MACs, 2 PCI blocks, and 24 transceiver blocks operating at up to 6.5536 Gbps.
| PCB | 1152 |
| ECCN | 3A001.a.7.a |
| PPAP | No |
| Jedec | MS-034AAR-1 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Mounting | Surface Mount |
| RAM Bits | 15100Kbit |
| Cage Code | 4BA62 |
| Pin Count | 1152 |
| Automotive | No |
| Lead Shape | Ball |
| PCI Blocks | 2 |
| Schedule B | 8542390000 |
| Family Name | Arria® V GX |
| Speed Grade | 5 |
| Package/Case | FC-FBGA |
| AEC Qualified | No |
| Dedicated DSP | 920 |
| Ethernet MACs | 2 |
| RoHS Versions | 2011/65/EU, 2015/863 |
| Pin Pitch (mm) | 1 |
| Programmability | Yes |
| Package Material | Plastic |
| Transceiver Speed | 6.5536Gbps |
| Basic Package Type | Ball Grid Array |
| Device Logic Cells | 300000 |
| Package Width (mm) | 35 |
| Process Technology | 28nm |
| Transceiver Blocks | 24 |
| Package Description | Flip Chip Fine Pitch Ball Grid Array |
| Package Family Name | BGA |
| Package Height (mm) | 2 |
| Package Length (mm) | 35 |
| Program Memory Type | SRAM |
| Number of Multipliers | 1840 (18x19) |
| Seated Plane Height (mm) | 2.5 |
| External Memory Interface | DDR2 SDRAM|DDR3 SDRAM|LPDDR2 SDRAM|RLDRAM II|QDRII+SRAM |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | 0°C |
| Total Number of Block RAM | 1510 |
| Device Number of DLLs/PLLs | 12 |
| Maximum Number of User I/Os | 544 |
| Differential I/O Standards Supported | LVPECL|LVDS |
| Single-Ended I/O Standards Supported | LVTTL|LVCMOS |
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