The 9DBL0841 is an 8-output 3.3V zero-delay/fanout clock buffer designed for PCIe Gen1 through Gen6 applications. It features low-power HCSL (LP-HCSL) outputs that eliminate the need for four resistors per output pair, supporting direct connection to 100-ohm transmission lines. It supports both Common and Independent Reference Clock architectures and is spread spectrum tolerant.
| RoHS |
Compliant |
| Lead Free |
Yes |
| Output Type |
LP-HCSL |
| PCIe Support |
Gen1, Gen2, Gen3, Gen4, Gen5, Gen6Generation |
| Supply Voltage |
3.3V |
| ZDB Mode Jitter |
100fs RMS |
| Number of Outputs |
8 |
| Maximum Output Frequency |
200MHz |
| Operating Temperature Range |
-40 to +85°C |
| Additive Jitter (Fanout Mode) |
18fs RMS |