9DBV0441AKLFT

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9DBV0441AKLFT - Renesas
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Краткое описание: 32-Pin VFQFPN EP Clock Driver, 4-Out LP-HCSL Diff
Производитель Renesas
Статус производства Производится (ACTIVE)

Дополнительная информация

Zero delay buffer clock driver featuring 4 differential outputs. This surface-mount component supports HCSL input logic and LP-HCSL output logic, operating with frequencies from 30 MHz to 137.5 MHz. The 32-pin VFQFPN EP package measures 5x5x0.95mm with a 0.5mm pin pitch. Key specifications include a maximum cycle-to-cycle jitter of 25 ps and maximum output skew of 50 ps.
PCB 32
ECCN EAR99
PPAP No
Type Clock Driver
Jedec MO-220
EU RoHS Yes
HTS Code 8542390001
Mounting Surface Mount
Cage Code SAN34
Pin Count 32
Automotive No
Lead Shape No Lead
Schedule B 8542390000
Package/Case VFQFPN EP
AEC Qualified No
RoHS Versions 2011/65/EU, 2015/863
Pin Pitch (mm) 0.5
Spread Spectrum No
Number of Inputs 1
Package Material Plastic
Input Logic Level HCSL
Input Signal Type Differential
Number of Outputs 4
Basic Package Type Non-Lead-Frame SMT
Maximum Duty Cycle 55%
Output Logic Level LP-HCSL
Output Signal Type Differential
Package Width (mm) 5
Maximum Output Skew 50ps
Package Description Very Fine Quad Flat Package No Lead, Exposed Pad
Package Family Name QFN
Package Height (mm) 0.95(Max)
Package Length (mm) 5
Maximum Input Frequency 137.5MHz
Minimum Input Frequency 30MHz
Maximum Output Frequency 137.5MHz
Minimum Output Frequency 30MHz
Seated Plane Height (mm) 1(Max)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Maximum Cycle to Cycle Jitter 25ps

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