CD4027BEE4
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Краткое описание:
Dual J-K Flip-Flop, CMOS, 24MHz, 18V, PDIP
Дополнительная информация
CMOS Dual J-K Master-Slave Flip-Flop, featuring positive edge clock triggering and non-inverting outputs. This integrated circuit offers two independent flip-flop elements, each with a single bit capacity, operating from a 3V to 18V supply range. It supports a maximum clock frequency of 24MHz and exhibits a propagation delay of 300ns. The component is housed in a 16-PDIP package for through-hole mounting, with gold contact plating and a wide operating temperature range of -55°C to 125°C. RoHS compliant and lead-free.
| RoHS | Compliant |
| Mount | Through Hole |
| Series | 4000B |
| Weight | 0.03357oz |
| Polarity | Non-Inverting |
| Frequency | 24MHz |
| Lead Free | Lead Free |
| Packaging | Rail/Tube |
| Input Type | SINGLE-ENDED |
| Technology | CMOS |
| Package/Case | PDIP |
| Logic Function | Flip-Flop |
| Number of Bits | 2 |
| RoHS Compliant | Yes |
| Contact Plating | Gold |
| Package Quantity | 25 |
| Propagation Delay | 300ns |
| Quiescent Current | 20uA |
| Max Supply Voltage | 18V |
| Min Supply Voltage | 3V |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Turn-On Delay Time | 45ns |
| Number of Input Lines | 2 |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Low Level Output Current | 1.5mA |
| High Level Output Current | -4.2mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Number of Bits per Element | 1 |
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