CD74AC112M
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Краткое описание:
Dual JK Flip-Flop, 100MHz, CMOS, SOIC, 1.5-5.5V
Дополнительная информация
Dual J-K flip-flops with set and reset functionality, featuring negative edge clock triggering. This CMOS logic IC operates at a maximum frequency of 100MHz with a propagation delay of 153ns and turn-on delay of 2.6ns. It supports a supply voltage range of 1.5V to 5.5V and offers output currents of 24mA (low level) and -24mA (high level). Packaged in a 16-SOIC surface mount configuration with gold contact plating, this RoHS compliant component is designed for operation between -55°C and 125°C.
| RoHS | Compliant |
| Mount | Surface Mount |
| Series | 74AC |
| Weight | 0.004998oz |
| Polarity | Non-Inverting |
| Frequency | 100MHz |
| Lead Free | Lead Free |
| Packaging | Rail/Tube |
| Input Type | SINGLE-ENDED |
| Technology | CMOS |
| Package/Case | SOIC |
| Max Frequency | 100MHz |
| Logic Function | Flip-Flop, JK-Type |
| Number of Bits | 2 |
| Output Current | 24mA |
| RoHS Compliant | Yes |
| Contact Plating | Gold |
| Package Quantity | 40 |
| Propagation Delay | 153ns |
| Quiescent Current | 4uA |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 1.5V |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Turn-On Delay Time | 2.6ns |
| Radiation Hardening | No |
| Reach SVHC Compliant | No |
| Number of Input Lines | 2 |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Negative Edge |
| Low Level Output Current | 24mA |
| High Level Output Current | -24mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Number of Bits per Element | 1 |
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