CD74HC107MT
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Dual JK Flip-Flop, CMOS, Negative Edge, 35MHz, SOIC
Дополнительная информация
Dual negative-edge-triggered J-K flip-flops with reset, featuring CMOS technology and a 35MHz frequency. This integrated circuit offers two independent flip-flop elements, each with a single-ended input and non-inverting output. Operating within a 2V to 6V supply voltage range, it provides a propagation delay of 170ns and a turn-on delay time of 14ns. Packaged in a 14-SOIC surface-mount format with gold contact plating, this RoHS-compliant component is suitable for operation from -55°C to 125°C.
| RoHS | Compliant |
| Mount | Surface Mount |
| Series | 74HC |
| Weight | 0.004564oz |
| Polarity | Non-Inverting |
| Frequency | 35MHz |
| Lead Free | Lead Free |
| Packaging | Tape and Reel |
| Input Type | SINGLE-ENDED |
| Technology | CMOS |
| Termination | SMD/SMT |
| Package/Case | SOIC |
| Logic Function | Flip-Flop, JK-Type |
| Number of Bits | 2 |
| Output Current | 5.2mA |
| RoHS Compliant | Yes |
| Contact Plating | Gold |
| Package Quantity | 1 |
| Propagation Delay | 170ns |
| Quiescent Current | 4uA |
| Max Supply Voltage | 6V |
| Min Supply Voltage | 2V |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Turn-On Delay Time | 14ns |
| Reach SVHC Compliant | No |
| Number of Input Lines | 2 |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Negative Edge |
| Low Level Output Current | 5.2mA |
| High Level Output Current | -5.2mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Number of Bits per Element | 1 |
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