CD74HC112PW
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Краткое описание:
Dual JK Flip-Flop, 60MHz, CMOS, Negative Edge, 2V-6V, TSSOP
Дополнительная информация
Dual negative-edge-triggered J-K flip-flops with set and reset functionality. This CMOS logic device operates with a maximum frequency of 60MHz and features a propagation delay of 270ns. Designed for surface mount, it is housed in a 16-TSSOP package with gold contact plating. The component supports a supply voltage range of 2V to 6V and offers an output current of 5.2mA. Operating temperature spans from -55°C to 125°C, with RoHS compliance.
| RoHS | Compliant |
| Mount | Surface Mount |
| Width | 4.5mm |
| Height | 1.05mm |
| Length | 5.1mm |
| Series | 74HC |
| Weight | 0.002183oz |
| Polarity | Non-Inverting |
| Frequency | 60MHz |
| Lead Free | Lead Free |
| Packaging | Rail/Tube |
| Input Type | SINGLE-ENDED |
| Technology | CMOS |
| Package/Case | TSSOP |
| Logic Function | Flip-Flop, JK-Type |
| Number of Bits | 2 |
| Output Current | 5.2mA |
| RoHS Compliant | Yes |
| Contact Plating | Gold |
| Input Capacitance | 10pF |
| Propagation Delay | 270ns |
| Quiescent Current | 4uA |
| Max Supply Voltage | 6V |
| Min Supply Voltage | 2V |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Turn-On Delay Time | 14ns |
| Reach SVHC Compliant | No |
| Number of Input Lines | 2 |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Negative Edge |
| Low Level Output Current | 5.2mA |
| High Level Output Current | -5.2mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Number of Bits per Element | 1 |
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