EP3CLS100F780I7N

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EP3CLS100F780I7N - Intel(Altera)
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Краткое описание: FPGA 100K Logic Cells 65nm 780-Pin FBGA 4347Kbit RAM
Производитель Intel(Altera)
Статус производства Производится (ACTIVE)

Дополнительная информация

Field Programmable Gate Array (FPGA) with 100,448 logic cells and 483 total block RAM. Features 4,347 Kbit RAM bits and 276 multipliers (18x18). Operates at 437.5MHz with 65nm process technology and a 1.2V supply. Supports a maximum of 413 user I/Os with extensive single-ended and differential I/O standards. Packaged in a 780-pin FBGA (Fine Pitch Ball Grid Array) for surface mounting.
PCB 780
ECCN 3A991
PPAP No
Jedec MS-034AAM-1
EU RoHS Yes with Exemption
HTS Code 8542390001
Mounting Surface Mount
RAM Bits 4347Kbit
Cage Code 4BA62
Pin Count 780
Automotive No
Lead Shape Ball
Schedule B 8542390000
Family Name Cyclone® III LS
Speed Grade 7
Package/Case FBGA
AEC Qualified No
RoHS Versions 2011/65/EU, 2015/863
Pin Pitch (mm) 1
Programmability No
Package Material Plastic
Supported IP Core Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Public Key Crypto Engine (BA414E)| 32|64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz
Basic Package Type Ball Grid Array
Device Logic Cells 100448
Package Width (mm) 29
Process Technology 65nm
Package Description Fine Pitch Ball Grid Array
Package Family Name BGA
Package Height (mm) 1.75
Package Length (mm) 29
Program Memory Type SRAM
Radiation Hardening No
Number of Multipliers 276 (18x18)
Seated Plane Height (mm) 2.25
External Memory Interface DDR2 SDRAM|QDRII+SRAM
Max Operating Temperature 100°C
Min Operating Temperature -40°C
Total Number of Block RAM 483
Device Number of DLLs/PLLs 4
Maximum Number of User I/Os 413
Supported IP Core Manufacture Altera/CAST, Inc/Barco Silex/PLDA
Differential I/O Standards Supported LVPECL|LVDS|HSTL-18|HSTL-15|HSTL-12|SSTL-2|SSTL-18|RSDS
Single-Ended I/O Standards Supported LVTTL|LVCMOS|PCI|PCI-X|SSTL|HSTL

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