EP3CLS150F484C7N

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EP3CLS150F484C7N - Intel(Altera)
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Краткое описание: FPGA Cyclone III LS, 150848 Cells, 65nm, 484-Pin FBGA, 210 I/Os
Производитель Intel(Altera)
Статус производства Производится (ACTIVE)

Дополнительная информация

Field Programmable Gate Array (FPGA) with 150,848 logic cells and 484 pins. Features 5994 Kbit of RAM, 320 (18x18) multipliers, and 4 DLLs/PLLs. Operates at 437.5MHz with 65nm process technology and a 1.2V supply. Supports surface mount installation via a 23mm x 23mm x 1.5mm FBGA package. Offers 210 maximum user I/Os and interfaces with DDR2 SDRAM and QDRII+ SRAM.
PCB 484
ECCN 3A991
PPAP No
Jedec MS-034AAJ-1
EU RoHS Yes
HTS Code 8542390001
Mounting Surface Mount
RAM Bits 5994Kbit
Cage Code 4BA62
Pin Count 484
Automotive No
Lead Shape Ball
Schedule B 8542390000
Family Name Cyclone® III LS
Speed Grade 7
Package/Case FBGA
AEC Qualified No
RoHS Versions 2011/65/EU
Pin Pitch (mm) 1
Programmability No
Package Material Plastic
Supported IP Core Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Public Key Crypto Engine (BA414E)| 32|64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz
Basic Package Type Ball Grid Array
Device Logic Cells 150848
Package Width (mm) 23
Process Technology 65nm
Package Description Fine Pitch Ball Grid Array
Package Family Name BGA
Package Height (mm) 1.5
Package Length (mm) 23
Program Memory Type SRAM
Radiation Hardening No
Number of Multipliers 320 (18x18)
Seated Plane Height (mm) 2
External Memory Interface DDR2 SDRAM|QDRII+SRAM
Max Operating Temperature 85°C
Min Operating Temperature 0°C
Total Number of Block RAM 666
Device Number of DLLs/PLLs 4
Maximum Number of User I/Os 210
Supported IP Core Manufacture Altera/CAST, Inc/Barco Silex/PLDA
Differential I/O Standards Supported LVPECL|LVDS|HSTL-18|HSTL-15|HSTL-12|SSTL-2|SSTL-18|RSDS
Single-Ended I/O Standards Supported LVTTL|LVCMOS|PCI|PCI-X|SSTL|HSTL

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