EP4CGX30DF19I8ES
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Краткое описание:
FPGA Cyclone IV GX 29440 Cells 60nm 324-Pin FBGA 3.125Gbps Transceivers
Дополнительная информация
Field Programmable Gate Array (FPGA) with 29,440 logic cells and 1080 Kbit RAM. This device utilizes 60nm process technology and features 2 Ethernet MACs, 80 18x18 multipliers, and 4 transceiver blocks operating at 3.125 Gbps. It supports a wide range of differential and single-ended I/O standards, including B-LVDS, HSTL, LVPECL, LVTTL, and LVCMOS, and interfaces with DDR2 SDRAM and QDRII+ SRAM. The FPGA is housed in a 324-pin, 19mm x 19mm Fine Pitch Ball Grid Array (FBGA) package for surface mounting, with an operating temperature range of -40°C to 100°C.
| PCB | 324 |
| ECCN | EAR99 |
| PPAP | No |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Mounting | Surface Mount |
| RAM Bits | 1080Kbit |
| Cage Code | 4BA62 |
| Pin Count | 324 |
| Automotive | No |
| Lead Shape | Ball |
| PCI Blocks | 1 |
| Schedule B | 8542390000 |
| Family Name | Cyclone® IV GX |
| Speed Grade | 8 |
| Package/Case | FBGA |
| AEC Qualified | No |
| Ethernet MACs | 2 |
| RoHS Versions | 2011/65/EU, 2015/863 |
| Pin Pitch (mm) | 1 |
| Programmability | Yes |
| Package Material | Plastic |
| Supported IP Core | Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|Sub-frame Latency JPEG 2000 Encoder (BA130)|PCI Express to AXI Bridge Controller (GPEX-PAB)|ISA/PC Card/PCMCIA/Compact Flash Host Adapter |
| Transceiver Speed | 3.125Gbps |
| Basic Package Type | Ball Grid Array |
| Device Logic Cells | 29440 |
| Package Width (mm) | 19 |
| Process Technology | 60nm |
| Transceiver Blocks | 4 |
| Package Description | Fine Pitch Ball Grid Array |
| Package Family Name | BGA |
| Package Height (mm) | 1.05 |
| Package Length (mm) | 19 |
| Program Memory Type | SRAM |
| Radiation Hardening | No |
| Number of Multipliers | 80 (18x18) |
| Seated Plane Height (mm) | 1.4 |
| External Memory Interface | DDR2 SDRAM|QDRII+SRAM |
| Max Operating Temperature | 100°C |
| Min Operating Temperature | -40°C |
| Total Number of Block RAM | 120 |
| Device Number of DLLs/PLLs | 2 |
| Maximum Number of User I/Os | 150 |
| Supported IP Core Manufacture | Altera/CAST, Inc/Barco Silex/Mobiveil, Inc/Eureka Technology Inc |
| Differential I/O Standards Supported | B-LVDS|HSTL|LVPECL|LVDS|RSDS|SSTL |
| Single-Ended I/O Standards Supported | LVTTL|LVCMOS|PCI|PCI-X|SSTL|HSTL |
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