Synchronous SRAM chip, 72M-bit density, featuring a dual-port architecture with 8M words x 8 bits per word. Offers a maximum access time of 0.45 ns and a maximum clock rate of 333 MHz, utilizing a QDR data rate architecture. Packaged in a 165-pin Fine Pitch Ball Grid Array (FBGA) with a 15mm x 13mm footprint and 1mm pin pitch, designed for surface mounting. Operates with a typical supply voltage of 1.8V, ranging from 1.7V to 1.9V, and supports a temperature range of -40°C to 100°C.
| PCB |
165 |
| ECCN |
3A991.b.2.b |
| PPAP |
No |
| Density |
72Mbit |
| EU RoHS |
Yes |
| HTS Code |
8542320041 |
| Mounting |
Surface Mount |
| Cage Code |
3BKC7 |
| Pin Count |
165 |
| Automotive |
No |
| Lead Shape |
Ball |
| Schedule B |
8542320040 |
| Timing Type |
Synchronous |
| Architecture |
Pipelined |
| Package/Case |
FBGA |
| AEC Qualified |
No |
| RoHS Versions |
2011/65/EU, 2015/863 |
| Pin Pitch (mm) |
1 |
| Density in Bits |
75497472bit |
| Number of Ports |
2 |
| Number of Words |
8M |
| Package Material |
Plastic |
| Address Bus Width |
21bit |
| Basic Package Type |
Ball Grid Array |
| Maximum Clock Rate |
333MHz |
| Package Width (mm) |
13 |
| Maximum Access Time |
0.45ns |
| Package Description |
Fine Pitch Ball Grid Array |
| Package Family Name |
BGA |
| Package Height (mm) |
0.94(Max) |
| Package Length (mm) |
15 |
| Data Rate Architecture |
QDR |
| Number of Bits per Word |
8bit |
| Seated Plane Height (mm) |
1.4(Max) |
| Max Operating Temperature |
100°C |
| Maximum Operating Current |
640mA |
| Min Operating Temperature |
-40°C |
| Max Operating Supply Voltage |
1.9V |
| Min Operating Supply Voltage |
1.7V |
| Typical Operating Supply Voltage |
1.8V |