The SmartLynq+ module is a high-speed debug and trace solution primarily targeting designs using the Versal platform. It features a high-speed debug port (HSDP) providing up to 28X faster Linux download speeds than the standard SmartLynq data cable. It supports 10Gb/s serial and 3.2Gb/s parallel trace with up to 14GB of trace memory, enabling full visibility into AI Engines, programmable NoC, DDR controllers, and 100G Ethernet cores.
| RoHS |
Compliant |
| Trace Memory |
14GB |
| Host Interface |
USB 3.0 / 10/100/1000 Ethernettype |
| Target Interface |
HSDP (USB Type-C), JTAG, Mictor, GPIOtype |
| Serial Trace Rate |
10Gb/s |
| Parallel Trace Rate |
3.2Gb/s |
| JTAG Max Clock Speed |
100MHz |
| Download Speed Improvement |
28Xmultiplier |