IS61NVF25618A-7.5B2
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Краткое описание:
4M-bit 256Kx18 Sync SRAM, 7.5ns, 2.5V, 119-Pin BGA
Дополнительная информация
Synchronous SRAM chip, 4M-bit density, 256K words x 18 bits. Features 7.5 ns maximum access time and 117 MHz maximum clock rate with SDR data rate architecture. Operates at a typical 2.5V supply voltage, with a 2-port, flow-through architecture. Packaged in a 119-pin BGA with a 1.27mm pin pitch, suitable for surface mounting.
| PCB | 119 |
| ECCN | 3A991.b.2.a |
| PPAP | No |
| Density | 4Mbit |
| EU RoHS | No |
| HTS Code | 8542320041 |
| Mounting | Surface Mount |
| Cage Code | 1J9V2 |
| Pin Count | 119 |
| Automotive | No |
| Lead Shape | Ball |
| Schedule B | 8542320040 |
| Timing Type | Synchronous |
| Architecture | Flow-Through |
| Package/Case | BGA |
| AEC Qualified | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
| Pin Pitch (mm) | 1.27 |
| Density in Bits | 4194304bit |
| Number of Ports | 2 |
| Number of Words | 256K |
| Package Material | Plastic |
| Address Bus Width | 18bit |
| Basic Package Type | Ball Grid Array |
| Maximum Clock Rate | 117MHz |
| Package Width (mm) | 14.2(Max) |
| Maximum Access Time | 7.5ns |
| Package Description | Plastic Ball Grid Array |
| Package Family Name | BGA |
| Package Height (mm) | 1.7(Max) |
| Package Length (mm) | 22.2(Max) |
| Radiation Hardening | No |
| Data Rate Architecture | SDR |
| Number of Bits per Word | 18bit |
| Seated Plane Height (mm) | 2.41(Max) |
| Max Operating Temperature | 70°C |
| Maximum Operating Current | 155mA |
| Min Operating Temperature | 0°C |
| Max Operating Supply Voltage | 2.55V |
| Min Operating Supply Voltage | 2.45V |
| Typical Operating Supply Voltage | 2.5V |
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