P4C164L-100DWMBLF

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P4C164L-100DWMBLF - Pyramid
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Краткое описание: Async SRAM 64Kbit 8Kx8 100ns 28-Pin CDIP W
Производитель Pyramid
Статус производства Производится (ACTIVE)

Дополнительная информация

Asynchronous SRAM chip, 64K bit density (8K x 8 words), featuring a 100ns maximum access time. This integrated circuit operates at a typical 5V supply voltage, with a range of 4.5V to 5.5V, and consumes a maximum of 145mA. Housed in a 28-pin Ceramic Dual In Line Package Wide Body (CDIP W) with through-hole mounting and a 2.54mm pin pitch, it supports a 13-bit address bus. Operating across a wide temperature range from -55°C to 125°C, this component is designed for robust performance.
PCB 28
ECCN 3A001.a.2.c
PPAP No
Density 64Kbit
EU RoHS Yes
HTS Code 8542320041
Mounting Through Hole
Cage Code 3DTT2
Pin Count 28
Automotive No
Lead Shape Through Hole
Schedule B 8542320040
Timing Type Asynchronous
Package/Case CDIP W
AEC Qualified No
RoHS Versions 2002/95/EC
Pin Pitch (mm) 2.54
Density in Bits 65536bit
Number of Ports 1
Number of Words 8K
Package Material Ceramic
Address Bus Width 13bit
Basic Package Type Through Hole
Package Width (mm) 15.49(Max)
Maximum Access Time 100ns
Package Description Ceramic Dual In Line Package Wide Body
Package Family Name DIP
Package Height (mm) 4.37(Max)
Package Length (mm) 37.85(Max)
Number of Bits per Word 8bit
Seated Plane Height (mm) 5.89(Max)
Max Operating Temperature 125°C
Maximum Operating Current 145mA
Min Operating Temperature -55°C
Max Operating Supply Voltage 5.5V
Min Operating Supply Voltage 4.5V
Typical Operating Supply Voltage 5V

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