The SI5383B-D00100-GM is a high-performance network synchronizer clock designed for SyncE/IEEE 1588 and SETS architectures. It features three independent DSPLLs in a single monolithic IC, providing flexible frequency synthesis with ultra-low jitter. The device supports a wide range of input frequencies from 1 PPS up to 750 MHz and offers differential and LVCMOS outputs with 0 ppm frequency synthesis error.
| RoHS |
Compliant |
| Standards |
ITU-T G.8262, G.8262.1, G.812, G.813 |
| Phase Jitter |
150fs RMS |
| Output Formats |
LVPECL, LVDS, CML, HCSL, LVCMOS |
| Number of DSPLLs |
3 |
| Supply Voltage (VDD) |
1.8, 3.3V |
| Input Frequency Range |
0.000001 to 750MHz |
| Output Frequency Range |
0.000001 to 718.5MHz |