SN65LVDS94DGGG4
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28-Channel LVDS Transceiver, 1904Mbps, 3.3V, TSSOP
Дополнительная информация
The LVDS serdes receiver expands four low-voltage differential input channels into 28 parallel LVTTL data channels at up to 1.904 Gbit/s throughput. It integrates five LVDS line receivers, four serial-in 7-bit parallel-out shift registers, and a 7× clock phase-locked-loop synthesizer to support point-to-point subsystem links with very low EMI over five balanced-pair conductors. Operating from a single 3.3-V supply, the device draws 250 mW typical and less than 1 mW when disabled, and it accepts a 20 MHz to 68 MHz phase-lock input frequency range. It is industrial temperature qualified for -40°C to 85°C ambient operation, meets or exceeds ANSI EIA/TIA-644 requirements, and is packaged in a lead-free thin shrink small-outline (TSSOP) package.
| RoHS | Compliant |
| Series | 65LVDS |
| Weight | 0.008229oz |
| Data Rate | 1904Mbps |
| Lead Free | Lead Free |
| Packaging | Rail/Tube |
| Package/Case | TSSOP |
| RoHS Compliant | Yes |
| Number of Inputs | 4 |
| Package Quantity | 35 |
| Number of Drivers | 28 |
| Number of Outputs | 28 |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of Elements | 4 |
| Number of Receivers | 4 |
| Radiation Hardening | No |
| Operating Supply Voltage | 3.3V |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
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