SN74HC109NE4
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Краткое описание:
Dual JK Flip-Flop, 60MHz, 5.2mA, PDIP, CMOS
Дополнительная информация
Dual J-K positive-edge-triggered flip-flops with clear and preset functionality. Features 2 circuits, each with 1 bit, operating from a 2V to 6V supply voltage range with a typical 5V operating voltage. Offers a maximum clock frequency of 60MHz and a propagation delay of 175ns. This CMOS technology component is housed in a 16-PDIP package for through-hole mounting and operates across a temperature range of -40°C to 85°C.
| RoHS | Compliant |
| Mount | Through Hole |
| Series | 74HC |
| Weight | 0.03357oz |
| Polarity | Non-Inverting |
| Frequency | 60MHz |
| Lead Free | Lead Free |
| Packaging | Rail/Tube |
| Technology | CMOS |
| Package/Case | PDIP |
| Logic Function | Flip-Flop, JK-Type |
| Number of Bits | 2 |
| Output Current | 5.2mA |
| RoHS Compliant | Yes |
| Package Quantity | 25 |
| Propagation Delay | 175ns |
| Max Supply Voltage | 6V |
| Min Supply Voltage | 2V |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Turn-On Delay Time | 12ns |
| Number of Input Lines | 2 |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Low Level Output Current | 4mA |
| Operating Supply Voltage | 5V |
| High Level Output Current | 5.2mA |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Number of Bits per Element | 1 |
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