SN74LS112AD
Производится
Увеличить
Краткое описание:
Dual JK Flip-Flop, Negative Edge, 125MHz, 5V, SOIC
Дополнительная информация
Dual J-K negative-edge-triggered flip-flops with clear and preset functionality. Features a 125MHz maximum frequency and 20ns propagation delay. Operates at 5V with a supply voltage range of 4.75V to 5.25V. Surface mountable in a 16-SOIC package, offering TTL output and 8mA low-level output current. RoHS compliant and lead-free.
| RoHS | Compliant |
| Mount | Surface Mount |
| Width | 4mm |
| Height | 1.5mm |
| Length | 10mm |
| Series | 74LS |
| Weight | 0.004998oz |
| Polarity | Non-Inverting |
| Frequency | 125MHz |
| Lead Free | Lead Free |
| Packaging | Rail/Tube |
| Output Type | TTL |
| Package/Case | SOIC |
| Logic Function | Flip-Flop, JK-Type |
| Number of Bits | 2 |
| Output Current | 8mA |
| RoHS Compliant | Yes |
| Package Quantity | 40 |
| Propagation Delay | 20ns |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Turn-On Delay Time | 15ns |
| Reach SVHC Compliant | No |
| Number of Input Lines | 5 |
| Number of Output Lines | 2 |
| Clock Edge Trigger Type | Negative Edge |
| Low Level Output Current | 8mA |
| Operating Supply Voltage | 5V |
| High Level Output Current | -400uA |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Number of Bits per Element | 1 |
Если у вас не открывается документ, нажмите, чтобы открыть файл в новой вкладке.
