SPEAR600-2
Не рекомендуется для новых проектов
Увеличить
Краткое описание:
32-bit RISC MPU, Dual-Core ARM926EJ-S, 333MHz, 420-Pin PBGA
Дополнительная информация
32-bit RISC microprocessor featuring a dual-core ARM926EJ-S architecture operating at up to 333 MHz. This surface-mount component utilizes a 420-pin Plastic Ball Grid Array (PBGA) package with a 1mm pin pitch. Integrated interfaces include Ethernet (GMII/MII, 10/100/1000Mbps), I2C, SPI, UART, and USB. It offers 16KB instruction and 16KB data cache, with an operating temperature range of -40°C to 85°C.
| CAN | 0 |
| I2C | 1 |
| I2S | 0 |
| PCB | 420 |
| SPI | 3 |
| USB | 3 |
| ECCN | 3A991.a.2 |
| PPAP | No |
| UART | 2 |
| Jedec | MS-034 |
| USART | 0 |
| EU RoHS | Yes |
| Ethernet | 1 |
| HTS Code | 8542310001 |
| Mounting | Surface Mount |
| Cage Code | SCR76 |
| Pin Count | 420 |
| Automotive | No |
| Lead Shape | Ball |
| Schedule B | 8542310000 |
| Device Core | ARM926EJ-S |
| Family Name | SPEAr |
| Package/Case | PBGA |
| AEC Qualified | No |
| Maximum Speed | 333MHz |
| RoHS Versions | 2011/65/EU, 2015/863 |
| Data Bus Width | 32bit |
| Ethernet Speed | 10Mbps/100Mbps/1000Mbps |
| Interface Type | Ethernet/I2C/SPI/UART/USB |
| Pin Pitch (mm) | 1 |
| Data Cache Size | 16KB |
| Package Material | Plastic |
| Core Architecture | ARM |
| Basic Package Type | Ball Grid Array |
| Package Width (mm) | 23 |
| Multiply Accumulate | No |
| Number of CPU Cores | 2 |
| Package Description | Plastic Ball Grid Array |
| Package Family Name | BGA |
| Package Height (mm) | 1.53 |
| Package Length (mm) | 23 |
| Radiation Hardening | No |
| Instruction Cache Size | 16KB |
| Ethernet Interface Type | GMII/MII |
| Seated Plane Height (mm) | 2.06(Max) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Instruction Set Architecture | RISC |
| Max Operating Supply Voltage | 1.1|1.9|2.75|3.6V |
Если у вас не открывается документ, нажмите, чтобы открыть файл в новой вкладке.
