TC4027BFN(F,N,M)

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TC4027BFN(F,N,M) - Toshiba
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Краткое описание: 2-Element JK-Master-Slave Flip-Flop, 16-Pin SOP, CMOS, Pos-Edge
Производитель Toshiba
Категория Шлёпанцы
Статус производства Снят с производства (OBSOLETE)

Дополнительная информация

Dual JK-Master-Slave Flip-Flop, positive-edge triggered, CMOS logic family. This surface-mount integrated circuit features two independent JK-Master-Slave flip-flop elements, each with two inputs and one output. Packaged in a 16-pin SOL (Small Outline IC) with gull-wing leads, it offers a 1.27mm pin pitch and operates within a temperature range of -40°C to 85°C.
PCB 16
ECCN EAR99
PPAP No
EU RoHS Yes
HTS Code 8542390001
Mounting Surface Mount
Polarity Inverting/Non-Inverting
Cage Code S0562
Pin Count 16
Automotive No
Lead Shape Gull-wing
Schedule B 8542390000
Logic Family 4000B
Package/Case SOL
AEC Qualified No
RoHS Versions 2002/95/EC
Logic Function JK-Master-Slave Type
Pin Pitch (mm) 1.27
Triggering Type Positive-Edge
Package Material Plastic
Basic Package Type Lead-Frame SMT
Package Width (mm) 3.9
Process Technology CMOS
Package Description Small Outline IC (L Lead)
Package Family Name SOP
Package Height (mm) 1.38
Package Length (mm) 9.9
Radiation Hardening No
Number of Element Inputs 2
Seated Plane Height (mm) 1.75(Max)
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Number of Element Outputs 1
Number of Elements per Chip 2

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