TC4027BP(N)

Снят с производства
TC4027BP(N) - Toshiba
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Краткое описание: JK Master-Slave Flip-Flop IC, 2-Element, CMOS, 16-Pin PDIP
Производитель Toshiba
Категория Шлёпанцы
Статус производства Снят с производства (OBSOLETE)

Дополнительная информация

Dual JK-Master-Slave Flip-Flop IC, featuring positive-edge triggering and CMOS logic. This integrated circuit offers two independent flip-flop elements, each with two inputs and one output, supporting inverting and non-inverting polarity. Housed in a 16-pin PDIP through-hole package with a 2.54mm pin pitch, it operates within a temperature range of -40°C to 85°C.
PCB 16
ECCN EAR99
PPAP No
Jedec MS-001BB
EU RoHS No
HTS Code 8542390001
Mounting Through Hole
Polarity Inverting/Non-Inverting
Cage Code S0562
Pin Count 16
Automotive No
Lead Shape Through Hole
Schedule B 8542390000
Logic Family 4000B
Package/Case PDIP
AEC Qualified No
RoHS Versions 2011/65/EU, 2015/863
Logic Function JK-Master-Slave Type
Pin Pitch (mm) 2.54
Triggering Type Positive-Edge
Package Material Plastic
Basic Package Type Through Hole
Package Width (mm) 6.4
Process Technology CMOS
Package Description Plastic Dual In Line Package
Package Family Name DIP
Package Height (mm) 3.5
Package Length (mm) 19.75(Max)
Radiation Hardening No
Number of Element Inputs 2
Seated Plane Height (mm) 4.15
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Number of Element Outputs 1
Number of Elements per Chip 2

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