DMP2012SN-7
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Краткое описание:
P-Channel JFET, -20V Vdss, -700mA ID, 300mR Rds On, SMT
Дополнительная информация
P-channel, silicon, metal-oxide semiconductor FET designed for small signal applications. Features a continuous drain current of -700mA and a drain-to-source voltage of -20V. Offers a low drain-to-source resistance of 300mR at a nominal gate-to-source voltage of -1.2V. This surface mount transistor has a threshold voltage of -1.2V and a maximum power dissipation of 500mW. Packaged in a compact SC-59 (TO-236-3) plastic package, it operates across a wide temperature range from -65°C to 150°C.
| RoHS | Compliant |
| Mount | Surface Mount |
| Width | 1.7mm |
| Height | 1.3mm |
| Length | 3.1mm |
| Weight | 0.000282oz |
| Polarity | P-CHANNEL |
| Fall Time | 20ns |
| Packaging | Tape and Reel |
| Rds On Max | 300mR |
| Nominal Vgs | -1.2V |
| Termination | SMD/SMT |
| Package/Case | TO-236-3 |
| RoHS Compliant | Yes |
| Package Quantity | 1 |
| Input Capacitance | 180pF |
| Threshold Voltage | -1.2V |
| Number of Channels | 1 |
| Turn-On Delay Time | 5ns |
| Dual Supply Voltage | -20V |
| Turn-Off Delay Time | 55ns |
| Reach SVHC Compliant | No |
| Max Power Dissipation | 500mW |
| Max Operating Temperature | 150°C |
| Min Operating Temperature | -65°C |
| Drain to Source Resistance | 300mR |
| Gate to Source Voltage (Vgs) | 12V |
| Continuous Drain Current (ID) | -700mA |
| Drain to Source Voltage (Vdss) | -20V |
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